• 1
NXP

NXP Semiconductors, provides High Performance Mixed Signal solutions that leverage its leading RF, Analogue, Power Management, Interface, Security and Digital Processing expertise. With Headquarters in Eindhoven, The Netherlands, NXP has 27,000 employees working in more than 25 countries with research and development activities in Asia, Europe and the United States, and manufacturing facilities in Asia and Europe. There are approximately 3,200 employees working for R&D in 23 locations of which over 2,600 supporting our High-Performance Mixed-Signal businesses. NXP has ~14,000 issued and pending patents.

Highlights on NXP:

  • NXP is a world market leader in connected vehicle technology as part of our promise: ‘Secure Connections for a Smarter World’
  • NXP technology is applied in over 90% of all cars produced in the world; the majority of the applied chip sets are designed and produced in Europe (NXP’s major Automotive R&D groups are in Nijmegen (the Netherlands), Hamburg (Germany) and Gratkorn (Austria). Next to the in-house production that in Europe is coming from Nijmegen (the Netherlands) and Hamburg (Germany), outsourced production will take place in Dresden (Germany)
  • NXP is committed to bring new connected car, safety and advanced driving assistance/automation features in high volume production cars and does so with automotive-grade quality and high focus on security
  • NXP is’/was already involved in many field trials over the world to ensure industry alignment and standardization, participates in relevant standardization and industry consortia and supports Open Source Initiatives for reasons of innovation, efficiency and eco-system development.

Role

NXP will develop a built-in aging monitor to enable in-field monitoring for fail-prediction. Different types of aging monitors will be evaluated, including monitoring of digital ICs and analogue components for different front-end processes. The aging monitor effectiveness will be first verified with proper aging simulation models. The selected aging monitors will then be implemented in at test chip and its performance evaluated.

The following high-level activities are anticipated;

  • Selection of the aging monitors based on innovate simulation tools and state-of-the-art models for aging.
  • Implementation of such aging monitors in test chips, and final validation including reliability experiments.

Key contributions

  • Methods to achieve fail-prediction and fail-operational performance on component- and system-level during lifetime, by on-device and inter-device lifetime testing and monitoring, focusing on in-vehicle networking.
  • On-chip/on-device and inter-chip/inter-device detection methods, fault injection methods and aging-monitoring and -prediction methods.

www.nxp.com

Netherlands

Germany

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  • TU Dresden

    TU Dresden

    TU Dresden focuses on analysis and assessment of residual risk for highly automated vehicles TU Dresden, founded in 1828, is Read More
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Austria

  • Infineon - Austria

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  • SBA Research

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  • Datasoft Embedded

    Datasoft Embedded

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  • TU Graz

    TU Graz

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Netherlands

  • TU Delft

    TU Delft

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  • NXP

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France

  • Inria

    Inria

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Norway

  • TracSense

    TracSense

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    Nxtech

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  • Sintef

    Sintef

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Czech Republic

  • IMA

    IMA

    IMA focuses on analysis of related standards, collection of the test requirements, implementation of the test methodology and optimization of Read More
  • Ceitec - Brno University of Technology

    Brno University of Technology

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Lithuania

  • TeraGlobus

    TeraGlobus

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United States

  • University of Nevada, Reno

    University of Nevada, Reno

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Acknowledgement

ArchitectECA2030 has been accepted for funding within (ECSEL JU) in collaboration with the European Union’s H2020 Framework Programs under grant agreement No 877539.

The project will receive an ECSEL JU funding up to 4 M€ completed with national budgets from national funding authorities in Germany, Netherlands, Czech Republic, Austria and Norway.  

Project Facts

Short Name: ArchitectECA2030

Full Name: Trustable architectures with acceptable residual risk for the electric, connected and automated cars

Duration:  01/07/2020- 30/06/2023

Total Costs: ~ € 13,6 Mio.

Consortium: 20 partners from 8 countries

Coordinator: Infineon Technologies AG

Funding

 

Horizon 2020
Horizon 2020

 

    

National Funding

National Funding

 


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